ACMP0MODE=MUX, DACCH0DATA=DACDATA, DACCONVTRIG=CHANNELSTART, ACMP1MODE=MUX, DACSTARTUP=FULLCYCLE
Peripheral Control Register
| DACCH0DATA | DAC CH0 data selection. 0 (DACDATA): DAC data is defined by CH0DATA in the DAC interface. 1 (THRES): DAC data is defined by THRES in CHx_INTERACT. |
| DACSTARTUP | DAC startup configuration 0 (FULLCYCLE): DAC is started a full LESENSECLK before sensor interaction starts. 1 (HALFCYCLE): DAC is started half a LESENSECLK cycle before sensor interaction starts. |
| DACCONVTRIG | DAC conversion trigger configuration 0 (CHANNELSTART): DAC is enabled before every LESENSE channle measurement. 1 (SCANSTART): DAC is only enabled once per scan. |
| ACMP0MODE | ACMP0 mode 0 (MUX): LESENSE controls POSSEL of ACMP0 1 (MUXTHRES): LESENSE controls POSSEL and reference divider of ACMP0 |
| ACMP1MODE | ACMP1 mode 0 (MUX): LESENSE controls the POSSEL of ACMP1 1 (MUXTHRES): LESENSE POSSEL and reference divider of ACMP1 |
| ACMP0INV | Invert analog comparator 0 output |
| ACMP1INV | Invert analog comparator 1 output |